1. Technical Field
The present invention relates to a control unit controlled by a microcode, and more particularly, to a control unit suitable for a data processing system requiring the real time processing such as a telecommunication unit, decode and/or encode unit.
2. Description of the Related Art
Conventionally, a system requiring high-speed processing such as decode and/or encode device for the image data is realized by a special purpose circuit (hard wired or wired logic). A system for processing a data stream standardized by MPEG1 (for game applications and others having many scene changes) or MPEG2 also strongly requires the real time processing and it has been usually realized by a special purpose circuit specifically designed and constructed.
On the other hand, many general purpose data processing systems generally use a microprocessor (MPU) or a digital signal processor (DSP). These processors having the arithmetic functions to be used for general purpose processing are not suitable for the applications in which a process to be performed in one clock is one of the greatest concern. If these processors are to be used especially in the fields requiring high-speed processing as the above, an expensive MPU and/or DSP having a guarantee of high-speed demands is required and it shall be operated in a very high-frequency condition. Even in such system, some temporal tolerance of a system level and/or an application level is still required for preventing serious timing critical path. Actually, therefore, a high-speed data processing system using MPU or DSP is difficult in view of both the cost and the technology of implementation.
With the recent progress of the semiconductor processing techniques, the applicability of the MPU or DSP in high-speed operation has come to wider. Nevertheless, the use of these devices has not yet diversified so much in the fields of application such as decoding/encoding processes requiring both a high fundamental operating frequency and one process per clock exactly.
It is therefore still common practice to realize a data processing system with a special purpose circuit in the data processing applications where high-speed operation is required and the fundamental operating frequency is higher than some degree. However, the data processing system realized with a special purpose circuit has a difficulty of meeting the requirement of specification change or expansion since those circuit and/or system are designed specifically. Therefore, to meet the specification change, redesigning or changing the architecture is usually performed. The data processing system using a special purpose circuit harbors the serious problem of a high development cost including the lead-time and a high production cost.
In spite of the solution using a processor containing the arithmetic functions, the use of a downloadable microcode (microprogram) can increase the processing speed. Also, in this system, namely in a control unit operated by the microcode, changing the program can accommodate the specification change and expansion.
However, when executing a plurality of real-time processes normally required for decoding, an attempt to realize such real-time processing with microcode gives rise to the need of switching a plurality of microprograms. Employing a method for selecting a plurality of memories storing microcode by a selector, selectors or the like depending on the need can shorten this switching time. This method, though effective in view of high-speed processing, loses its attractiveness with the increase in the types and the number of the real time processes. In other words, a multiplicity of memories corresponding to the type and the number of the processes are required, and so are a great number of selectors for switching the memories accordingly. An attempt to implement such an enormous architecture actually encounters the problems in terms of both the operating frequency and the circuit size. Further, processes which may have common elements cannot be multiplexed, resulting in an uneconomical system floated with many wasteful microcodes.
A method for attaining an economical one may consist of a step determining the factors of a process required for a program using the microcode, and a step reloading the microcode as required for the particular process. This method, however, consumes the time for the processes of starting the program, such as for judgment, saving and loading, and reduces the responsiveness of the system. This method, thus, fails to attain the object of the system, i.e. real time response, which cannot be accepted.
An another method can be proposed. In this method, the special processes executed usually performed in special purpose circuits are microprogrammed in appropriated program units. During the microprogram of the special purpose is executed, whenever the need of an error handling process or a general purpose process such as communication arises, an interrupt request is issued and the microprograms are switched in response to the interrupt request. This method still poses the problem of the responsiveness. Specifically, upon occurrence of an interrupt from an external source during the execution of a special purpose process associated with a special purpose circuit, the instruction under execution is required to be suspended or it is necessary to wait until the end of the execution of the instruction. For suspending the instruction, the register state on that occasion must be stored. In spite of the fact the process requiring a real time response is going on, the saving or loading in the register results in an overhead of at least several clocks. On the other hand, waiting until the end of the execution of the instruction means the delay of the timing for processing a required general purpose instruction.
Providing a plurality of processing units corresponding to the units of microprogram solves this problem. However, the need of providing a plurality of processing units having a similar structure increases the circuit size. Further, additional circuits and instructions are required for synchronizing the processes performed in a plurality of the processing units. A plurality of processing units almost equivalent to the processors having arithmetic units are required. In addition, the microprogram shall be changed for the parallel processing. Thus, this method is also uneconomical in view of circuit size and program development.
An another method may be provided. In this method, in stead of a plurality of microprogram processing units mentioned above, a special purpose circuit or circuits are provided in addition to a microprogram processing unit and the circuits are controlled by microcode instruction. However, the special purpose circuits are controlled by a combination program including microcode instruction for general purpose processing, a concurrent and/or parallel processing of an interrupt or other instruction cannot be executed, but the load/store operation is executed using the register, resulting in a considerable overhead. Therefore, it is difficult to realize a real-time high-speed processing.
As described above, a control unit using a microcode is capable of executing relatively high-speed and flexible processing and therefore it is a prospective data processing method or system for real time processing. Nevertheless, a substantially complete architecture capable of handling the real time process has not been proposed yet.
Further, it is necessary to point out several microcode problems as a prerequisite to the present invention. In the conventional control operation using the microcode, a fixed-length instruction has been long in use for the apparent reason of simple control operation. This is an important factor for improving the processing speed, but is not considered a satisfactory choice in view of code efficiency. In fact, traditionally a larger data processing system such as a microprocessor having the arithmetic function has also employed the variable-length instruction in view of the code efficiency. The variable-length instruction, though a satisfactory choice for its high code efficiency, has been avoided in microprocessor applications requiring high-speed processing because of the need of a complicated prefetch control for improving the throughput of the processor and the need of additional instruction code queues.
It is well known that branch instruction, conditional instructions, subroutine call, return, branch to and return from an interrupt process request service, stack processing, etc. are preferably supported at instruction level so as to improve the microcode programming efficiency. However, these processes, which consume several clocks, cannot be easily adapted to the real time processing in which the control operation shall be performed in units of a clock. Hence, those instructions have so far been considered nothing but a factor for increasing the overhead. In other words, to seek for a high-speed response by microcode control has been incompatible with the employment of the branch instructions, call/return instructions (including the return instructions from the interrupt process other than the return from a subroutine) intended to improve the productivity of the microcode programming.
In the super-pipelined technique or the super-scalar technique currently employed in the high-performance microprocessors, the overhead problem due to the return process is alleviated to some extent, though in terms of the average frequency of instruction execution, by improving the operating frequency or the throughput of the data processing. These technologies, however, have not essentially solved the penalty for a branch call, a subroutine call or an interrupt. In other words, even the currently used high-performance microprocessor is not essentially suitable as it harbors many problems in such applications as real time control which must be processed in count of a clock. The problem is not simply that of the increased circuit size and the cost effectiveness, but a more basic one depending on a considerable measure on the control and/or instruction architecture.
Accordingly, an object of the present invention is to provide a high-speed, flexible control unit and a data processing system applicable to the fields hitherto considered difficult to realize without a specifically designed system. Specifically, an object of the present invention is to provide a micro-architecture that makes it possible to execute multiprocessing or parallel processing of a special purpose microprogram or microprograms corresponding to the applications and a general data processing microprogram by a simple method.
Another object of the invention is to provide, on the basis of the micro-architecture, a control unit and a data processing system capable of multiprocessing or interrupt handling which has conventionally been considered difficult to apply in the fields requiring the real time response and control in units of a clock.
Still another object of the present invention is to provide a compact, inexpensive control unit and a data processing system capable of high-speed control by a microprogram, capable of special purpose processing for each application and capable of meeting the requirement for modification and expansion.